The present invention relates generally to methods for improving the interface between a dielectric and a conductor in semiconductor devices.
The reliable operation of integrated circuits is critically dependent on the reliability of the increasingly thin dielectric layers used in circuit devices. As transistors have become smaller and more densely packed, the dielectrics have become thinner. Capacitor and gate dielectrics are often less than 80 angstroms in thickness, sometimes approaching 50 angstroms or less. For integrated circuits to work, these thin layers in each of thousands of different transistors must provide sufficient capacitance to drive the device, protect the channel from migration of impurities and avoid production of charge traps at their interfaces. These demanding requirements may soon exceed the capacities of conventional silicon oxide layers. Silicon oxide layers less than 2 nm may have prohibitively large leakage currents.
Efforts to replace silicon oxide as the gate dielectric have thus far proved less than satisfactory. Because of its relatively low dielectric constant (approx. 3.9), the largest capacitance obtainable with a thin layer of silicon oxide is about 25 fF/xcexcm2. This limits the scaling of transistors to smaller sizes because the capacitance will not be sufficient to drive the device. Higher dielectric constant tantalum oxide has been tried, but results are poor due to a high density of charge traps at the dielectric/silicon interface. Composite layers of SiO2/Ta2O5 and SiO2/Ta2O5/SiO2 were tried, but the necessary resulting thicknesses limit the capacitance which can be obtained. Efforts have also been made to prevent charge traps by depositing a thin layer of silicon nitride between the silicon and the tantalum oxide. But the nitride layer also reduces the capacitance and thus limits scaling of the device. See U.S. Pat. No. 5,468,687 issued to D. Carl et al on Nov. 21, 1995 and Y. Momiyama et al, xe2x80x9cUltra-Thin Ta2O5/SiO2Gate Insulator with TiN Gatexe2x80x9d, 1997 Symposium on VLSI Technology, Digest of Technical Papers, pp. 135-136. Furthermore, efforts to make capacitors using Ta2O5 films deposited by reactive sputtering, chemical vapor deposition (CVD), and plasma enhanced chemical vapor deposition have produced devices having high leakage currents and low breakdown voltages. See T Aoyama et al., xe2x80x9cLeakage current mechanism of amorphous and polycrystalline Ta2 O5 films grown by chemical vapor depositionxe2x80x9d, J. Electrochem. Soc., Vol. 143, No. 3, pp. 977-983 (March 1996).
Furthermore, these Ta2O5 films degraded upon thermal annealing above 200xc2x0 C. with irreversible increases in the temperature coefficient of capacitance (TCC) and the dissipation factor. See J. M. Schoen et al, xe2x80x9cThe correlation between temperature coefficient of capacitance and dielectric loss in tantalum and tantalum-aluminum anodic oxides,xe2x80x9d J. Electrochem. Soc., Vol. 119, pp. 1215-1217 (September 1972). This degradation is believed to be due to the diffusion of electrode metal atoms into the dielectric and diffusion of oxygen out, creating oxygen deficiency defects.
A variety of electrode metals have been tried to overcome degradation problems, but with less than satisfactory results. Chromium was tried but specifically rejected. See M. Peters et al., xe2x80x9cThermally stable thin film tantalum pentoxide capacitorxe2x80x9d, Proc. of the International Conference on Multichip Modules, Denver, pp. 94-99 (April 1996).
Ruthenium (Ru) has been employed for both the bottom and top electrodes in a capacitive structure, with mixed results. Referring to FIG. 1, a film of Ta2O5 104 was deposited over the bottom electrode 102 as the dielectric layer 104 in this stack 100. After annealing of the dielectric layer 104 in an oxygen rich environment, a top electrode 106 was deposited over the dielectric layer 104. The interface between the top electrode 106 and the dielectric 104 can be problematic, as reaction between the dielectric layer and the ruthenium may occur, leading to mixing of phases between the two layers and oxygen scavenging from the dielectric layer which reduces the overall dielectric constant.
Similarly, tungsten (W) and other metals run the same risk of phase mixing with the dielectric layer and oxidation scavenging of the dielectric layer upon deposition over the dielectric layer. When nitrides of metals, such as TiN or TaN are used, and NH3 is used in forming the nitride as it is being deposited, the NH3 in the process can act to reduce the dielectric layer, which also degrades its performance.
As such, there is a need for improved processes for employing high k dielectrics in thin films to make semiconductor devices that will not degrade due to the diffusion of electrode metal atoms into the dielectric and diffusion of oxygen out, creating oxygen deficiency defects. There is also a need to produce these devices at temperatures which will not degrade the dielectric or metals in the devices.
In view of the foregoing background, the present invention is directed to improved processes for making interfaces between high k dielectrics and conducting layers that will provide superior performance to those known in the art, and products resulting therefrom.
The present invention includes a method of making a barrier on a high k dielectric material by providing a substrate having an upper surface comprising a high k dielectric material; remotely generating a plasma using a nitrogen containing source; and flowing the plasma over the upper surface comprising a high k dielectric material to form an oxynitride layer on the upper surface.
At least the upper surface of the substrate may be annealed in an oxygen rich environment prior to flowing the plasma.
In an example where the high k dielectric material comprises Ta2O5, the nitrogen containing source may comprise N2 and the oxynitride layer which is formed comprises TaON.
In another example, a remote plasma is generated using NH3 as a nitrogen containing source, and a TaON layer is formed by flowing the plasma over the high k material.
In either of the above examples, a remote plasma may be generated using an oxygen containing source, and the plasma is flowed over the oxynitride layer to saturate any reduced species remaining in the oxynitride layer.
A conducting layer is then deposited over the oxynitride layer, by chemical vapor deposition, for example. In the case of a capacitor stack arrangement, the conducting layer is a top electrode. The conducting layer may comprise TiN, for example.
Generally, the processes according to the present invention are conducted within a temperature range of about 300xc2x0 to 700xc2x0 C. and are thus appropriate for low thermal budget applications.
In another example, a layer of TiN is deposited over a high k dielectric material, by chemical vapor deposition, for example. A remote plasma is formed using an oxygen containing source, and the plasma is flowed over the TiN layer to form an oxynitride layer on the upper surface.
At least the upper surface of the high k dielectric material may be annealed prior to depositing the layer of TiN.
The oxygen containing source may be oxygen or N2O, for example.
The high k dielectric material may comprise Ta2O5, for example, in which case the oxynitride layer comprises TaON.
A conducting layer is next deposited over the oxynitride layer. In the case of a capacitor stack arrangement, the conducting layer is a top electrode. The conducting layer may comprise TiN, for example.
A stack capacitor device comprising a high k dielectric layer, a barrier layer overlying the high k dielectric layer and having been formed, at least in part by a remote plasma process; and a top electrode overlying the barrier layer is disclosed.
The high k dielectric layer may comprise Ta2O5. The barrier layer may comprise TaON or TiON, for example. The top electrode may comprise TiN.
The present invention provides methods for improving the performance of a stack capacitor. For example, deposition of a barrier layer of either TaON or TiON between a high k dielectric layer and a top electrode in the presence of a low thermal budget can improve the performance of the stack capacitor.
The capacitors of the present invention have substantially the same characteristics when subjected to either a forward bias or a reverse bias. Also, because of the low leakage current density of the capacitors of the present invention (which is indicative of a low defect density), capacitors with larger areas than prior art capacitors are possible. Also, because of the fact that anodic oxidation of the metal occurs at relatively low temperatures, the process of the present invention is useful when forming capacitors on substrates that cannot be subjected to the high temperature annealing process prescribed by the prior art for reducing the leakage current density of dielectric materials.
The formation of a barrier layer according to the present invention, at the interface between a high k dielectric layer and the top electrode significantly improves the dielectric properties of the stack capacitor. For example, it was found that creating a Ta2O5 monolayer with Remote Plasma Nitridation (RPN) in combination with ammonia, later followed with Remote Plasma Oxidation (RPO) produces a thicker layer of TaON because oxygen vacancies are filled during the oxidation process. This results in a statistically more uniform breakdown voltage and a low leakage current of the capacitors.
In accordance with the invention, an improved electronic device is formed by depositing a thin film of high dielectric constant material on a substrate, exposing the structure to a remotely generated plasma to form a barrier layer; saturating the barrier layer by remote plasma oxidation (RPO) and then forming the top electrode. The plasma substantially reduces the density of charge traps at the dielectric/substrate interface because oxygen vacancies are saturated by the RPO step. Advantageously, the barrier layer prevents interdiffusion of metallic material and oxygen between the electrode and the dielectric thereby improving capacitor performance.
In another example, a high k dielectric is made from a top portion of a metal nitride layer by remotely generating a plasma using an oxygen containing source, and flowing the plasma over the upper surface of the metal nitride layer and diffusing oxygen into the layer to form a metal oxynitride on the upper surface. The bottom electrode may be made by physical vapor deposition of tantalum nitride.
A high capacitance density, MIM capacitor can thus be made, comprising a bottom electrode of tantalum nitride deposited by physical vapor deposition; an insulation layer formed by remote plasma oxidation of the upper surface of the tantalum nitride layer; and a top electrode formed over the insulative layer of TaON.
The top electrode may comprise titanium nitride or tantalum nitride, and may be deposited by chemical vapor deposition or physical vapor deposition processes.
The amount of nitrogen relative to metal may be varied, such that the upper portion of the bottom electrode has a different nitrogen to metal ratio (generally higher) than the nitrogen to metal ratio of the portion of the bottom electrode underlying the upper portion.